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ISQED
2002
IEEE
105views Hardware» more  ISQED 2002»
14 years 19 days ago
Impact Analysis of Process Variability on Clock Skew
This paper presents a methodology for the statistical analysis of clock tree structures. It allows to accurately predict and analyze the impact of process variation on clock skew....
Enrico Malavasi, Stefano Zanella, Min Cao, Julian ...
BIOCOMP
2006
13 years 9 months ago
Petri Net Based Model Of The T Cell Receptor Signaling Pathway
Intracellular signaling pathways as well as the interactions and coordination that exist among them are complex and difficult to visualize and understand. Computer-based models of...
Srinidhi Jayasuryan, Anil Bamezai, Vijay Gehlot
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
14 years 1 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
13 years 12 months ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg
AHSWN
2010
103views more  AHSWN 2010»
13 years 7 months ago
Efficient Data Retrieving in Distributed Data-streaming Environments
In a potential distributed application, Automobile Tracking System (ATS), automobile location data is continuously generated, kept in a distributed manner. As large amount of traff...
Jinsong Han, Jun Miao, Jizhong Zhao, Jinpeng Huai,...