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VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
16 years 4 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
SC
2005
ACM
15 years 9 months ago
Leading Computational Methods on Scalar and Vector HEC Platforms
The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, ...
Leonid Oliker, Jonathan Carter, Michael F. Wehner,...
ACMSE
2006
ACM
15 years 10 months ago
HELLAS: a specialized architecture for interactive deformable object modeling
Applications involving interactive modeling of deformable objects require highly iterative, floating-point intensive numerical simulations. As the complexity of these models incr...
Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kell...
HCW
2000
IEEE
15 years 8 months ago
Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
Paolo Palazzari, Lidia Arcipiani, Massimo Celino, ...
VC
2010
197views more  VC 2010»
14 years 10 months ago
A high dynamic range rendering pipeline for interactive applications
High Dynamic Range (HDR) rendering has a growing success in video-games and virtual reality applications, as it improves the image quality and the player's immersion feeling....
Josselin Petit, Roland Brémond