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TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
ISLPED
2009
ACM
154views Hardware» more  ISLPED 2009»
14 years 6 days ago
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
We present experimental analysis to exploit the sequence dependence on energy saving in error tolerant image processing. Our analysis shows that the error distributions depend not...
Se Hun Kim, Saibal Mukhopadhyay, Wayne Wolf
JNW
2008
98views more  JNW 2008»
13 years 7 months ago
Analysing a Multi-hop UMTS over Multiple Frequency Schemes and an Urban Environment
In this paper we analyse the performance of a relay based UMTS system in an urban environment using multiple hops on multiple frequency bands. Measurement based path loss, fading a...
Konstantinos Konstantinou, Muhammad Ali Imran, Cos...
WSC
1997
13 years 9 months ago
AutoSched Tutorial
The AutoSchedTM finite capacity planning and scheduling tool helps you increase throughput, reduce in-process inventory, and increase equipment and personnel utilization. AutoSche...
Bill Lindler
DFT
2004
IEEE
95views VLSI» more  DFT 2004»
13 years 11 months ago
Mixed Loopback BiST for RF Digital Transceivers
In this paper we analyze the performance of a mixed built-in-self-test (BiST) for RF IC digital transceivers, where a baseband processor can be used both as a test pattern generat...
Jerzy Dabrowski, Javier Gonzalez Bayon