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» Simulation based deadlock analysis for system level designs
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ASPLOS
2012
ACM
12 years 3 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel
ACSAC
2008
IEEE
14 years 2 months ago
Defending Against Attacks on Main Memory Persistence
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
SRDS
2007
IEEE
14 years 1 months ago
RAPID: Reliable Probabilistic Dissemination in Wireless Ad-Hoc Networks
In this paper, we propose a novel ReliAble ProbabIlistic Dissemination protocol, RAPID, for mobile wireless ad-hoc networks that tolerates message omissions, node crashes, and sel...
Vadim Drabkin, Roy Friedman, Gabriel Kliot, Marc S...
VR
2007
IEEE
14 years 1 months ago
Variability-Aware Latency Amelioration in Distributed Environments
Application designers of collaborative distributed Virtual Environments must account for the influence of the network connection and its detrimental effects on user performance. ...
Alexey Tumanov, Robert S. Allison, Wolfgang St&uum...
GLOBECOM
2006
IEEE
14 years 1 months ago
Improved High-rate Space-Time-Frequency Block Codes
— High-rate space-time-frequency block codes (STFBC) are promising for achieving high bandwidth efficiency, low overhead and latency. Recently, a class of low-complexity STFBC m...
Jinsong Wu, Steven D. Blostein