Sciweavers

1304 search results - page 179 / 261
» Simulation of Soliton Circuits
Sort
View
FDTC
2006
Springer
117views Cryptology» more  FDTC 2006»
14 years 18 days ago
DPA on Faulty Cryptographic Hardware and Countermeasures
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...
DAC
1995
ACM
14 years 15 days ago
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Prashant Sawkar, Donald E. Thomas
IJON
2006
76views more  IJON 2006»
13 years 9 months ago
Evolving networks of integrate-and-fire neurons
This paper addresses the following question: ``What neural circuits can emulate the monosynaptic correlogram generated by a direct connection between two neurons?'' The ...
Francisco J. Veredas, Francisco J. Vico, Jos&eacut...
ENGL
2007
63views more  ENGL 2007»
13 years 9 months ago
A Full Integrated Gain Variable LNA for WCDMA
—In this paper we propose a gain-variable low noise amplifier (LNA) for low-voltage and low power WCDMA application. The LNA is designed based on a current-reused topology and a ...
Zhi-Ming Lin, Yu-Chun Huang
TON
2008
95views more  TON 2008»
13 years 8 months ago
Integration of explicit effective-bandwidth-based QoS routing with best-effort routing
This paper presents a methodology for protecting low-priority best-effort (BE) traffic in a network domain that provides both virtual-circuit routing with bandwidth reservation for...
Stephen L. Spitler, Daniel C. Lee