Sciweavers

36 search results - page 5 / 8
» Simulation tools to study a distributed shared memory for cl...
Sort
View
HPCA
1997
IEEE
13 years 11 months ago
A Performance Comparison of Hierarchical Ring- and Mesh-Connected Multiprocessor Networks
This paper compares the performance of hierarchical ring- and mesh-connected wormhole routed shared memory multiprocessor networks in a simulation study. Hierarchical rings are in...
Govindan Ravindran, Michael Stumm
ICPP
1998
IEEE
13 years 11 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
IPPS
2007
IEEE
14 years 1 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
14 years 8 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
IPPS
2007
IEEE
14 years 1 months ago
Performance Evaluation of two Parallel Programming Paradigms Applied to the Symplectic Integrator Running on COTS PC Cluster
There are two popular parallel programming paradigms available to high performance computing users such as engineering and physics professionals: message passing and distributed s...
Lorena B. C. Passos, Gerson H. Pfitscher, Tarcisio...