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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 1 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
JUCS
2010
142views more  JUCS 2010»
13 years 5 months ago
Mobile Agent Routing with Time Constraints: A Resource Constrained Longest-Path Approach
: Mobile agent technology advocates the mobility of code rather than the transfer of data. As data is found in several sites, a mobile agent has to plan an itinerary to visit sever...
Eduardo Camponogara, Ricardo Boveto Shima
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
13 years 8 months ago
Automated techniques for energy efficient scheduling on homogeneous and heterogeneous chip multi-processor architectures
Abstract-- We address performance maximization of independent task sets under energy constraint on chip multi-processor (CMP) architectures that support multiple voltage/frequency ...
Sushu Zhang, Karam S. Chatha
PRDC
2008
IEEE
14 years 1 months ago
Conjoined Pipeline: Enhancing Hardware Reliability and Performance through Organized Pipeline Redundancy
Reliability has become a serious concern as systems embrace nanometer technologies. In this paper, we propose a novel approach for organizing redundancy that provides high degree ...
Viswanathan Subramanian, Arun K. Somani
CIT
2007
Springer
14 years 27 days ago
Performance Assessment of Some Clustering Algorithms Based on a Fuzzy Granulation-Degranulation Criterion
In this paper a fuzzy quantization dequantization criterion is used to propose an evaluation technique to determine the appropriate clustering algorithm suitable for a particular ...
Sriparna Saha, Sanghamitra Bandyopadhyay