80 search results - page 6 / 16 » Slack analysis in the system design loop |
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
WORDS
2005
IEEE
14 years 2 months ago
2005
IEEE
Reliable program Worst-Case Execution Time (WCET) estimates are a key component when designing and verifying real-time systems. One way to derive such estimates is by static WCET ...
VLSISP
2008
13 years 7 months ago
2008
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...