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FPL
2001
Springer
130views Hardware» more  FPL 2001»
14 years 1 months ago
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits
Designers of safety-critical VLSI systems are asking for effective tools for evaluating and validating their designs. Fault Injection is commonly adopted for this task, and its eff...
Pierluigi Civera, Luca Macchiarulo, Maurizio Rebau...
PRDC
1999
IEEE
14 years 1 months ago
An Architecture-Based Software Reliability Model
In this paper we present an analytical model for estimating architecture-based software reliability, according to the reliability of each component, the operational profile, and t...
Wen-Li Wang, Ye Wu, Mei-Hwa Chen
IPPS
2008
IEEE
14 years 3 months ago
VT-ASOS: Holistic system software customization for many cores
VT-ASOS is a framework for holistic and continuous customization of system software on HPC systems. The framework leverages paravirtualization technology. VT-ASOS extends the Xen ...
Dimitrios S. Nikolopoulos, Godmar Back, Jyotirmaya...
TPDS
2010
125views more  TPDS 2010»
13 years 3 months ago
Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
Ricardo Fernández Pascual, José M. G...
SAC
2006
ACM
13 years 8 months ago
A new method of generating synchronizable test sequences that detect output-shifting faults based on multiple UIO sequences
The objective of testing is to determine the conformance between a system and its specification. When testing distributed systems, the existence of multiple testers brings out the...
Kai Chen, Fan Jiang, Chuan-dong Huang