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» Software Model Checking Using Linear Constraints
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IEEEPACT
2007
IEEE
14 years 4 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
ASWEC
2007
IEEE
14 years 4 months ago
Timed Behavior Trees and Their Application to Verifying Real-Time Systems
Behavior Trees (BTs) are a graphical notation used for formalising functional requirements and have been successfully applied to several case studies. However, the notation curren...
Lars Grunske, Kirsten Winter, Robert Colvin
ASWEC
2006
IEEE
14 years 3 months ago
Formally Analysing a Security Protocol for Replay Attacks
The Kerberos-One-Time protocol is a key distribution protocol promoted for use with Javacards to provide secure communication over the GSM mobile phone network. From inspection we...
Benjamin W. Long, Colin J. Fidge
ESEM
2008
ACM
13 years 11 months ago
A hybrid faulty module prediction using association rule mining and logistic regression analysis
This paper proposes a fault-prone module prediction method that combines association rule mining with logistic regression analysis. In the proposed method, we focus on three key m...
Yasutaka Kamei, Akito Monden, Shuuji Morisaki, Ken...
ICASSP
2009
IEEE
14 years 4 months ago
A global optimization framework for meeting summarization
We introduce a model for extractive meeting summarization based on the hypothesis that utterances convey bits of information, or concepts. Using keyphrases as concepts weighted by...
Daniel Gillick, Korbinian Riedhammer, Benoît...