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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
EMSOFT
2007
Springer
14 years 2 months ago
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
This paper proposes a scheduling strategy and an automatic scheduling flow that enable the simultaneous execution of multiple hard-real-time dataflow jobs. Each job has its own ...
Orlando Moreira, Frederico Valente, Marco Bekooij
SIES
2009
IEEE
14 years 2 months ago
A flexible design flow for software IP binding in commodity FPGA
— Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their...
Michael Gora, Abhranil Maiti, Patrick Schaumont
JSA
2010
173views more  JSA 2010»
13 years 2 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...
FORTE
1998
13 years 9 months ago
Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development
: In this paper a co-design methodology based on multiformalism modelling is presented. It defines a platform that integrates different notations and, the necessary mechanisms to h...
Nikos S. Voros, S. K. Tsasakou, C. Valderrama, S. ...