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» Software Reuse: An Overview
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CODES
2009
IEEE
13 years 11 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
13 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
POPL
2000
ACM
13 years 11 months ago
Modular Refinement of Hierarchic Reactive Machines
with existing analysis tools. Modular reasoning principles such as abstraction, compositional refinement, and assume-guarantee reasoning are well understood for architectural hiera...
Rajeev Alur, Radu Grosu
NSDI
2007
13 years 9 months ago
An Experimentation Workbench for Replayable Networking Research
The network and distributed systems research communities have an increasing need for “replayable” research, but our current experimentation resources fall short of reaching th...
Eric Eide, Leigh Stoller, Jay Lepreau
AOSD
2008
ACM
13 years 9 months ago
"Program, enhance thyself!": demand-driven pattern-oriented program enhancement
Program enhancement refers to adding new functionality to an existing program. We argue that repetitive program enhancement tasks can be expressed as patterns, and that the applic...
Eli Tilevich, Godmar Back