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ISPASS
2010
IEEE
14 years 2 months ago
Hardware prediction of OS run-length for fine-grained resource customization
—In the past ten years, computer architecture has seen a paradigm shift from emphasizing single thread performance to energy efficient, throughput oriented, chip multiprocessors...
David Nellans, Kshitij Sudan, Rajeev Balasubramoni...
WSCG
2004
154views more  WSCG 2004»
13 years 9 months ago
Emulating an Offline Renderer by 3D Graphics Hardware
3D design software has since long employed graphics chips for low-quality real-time previewing. But their dramatically increased computing power now paves the way to accelerate th...
Jörn Loviscach
LCTRTS
2010
Springer
14 years 2 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski
CASES
2009
ACM
14 years 2 months ago
Towards scalable reliability frameworks for error prone CMPs
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
Joseph Sloan, Rakesh Kumar
EMSOFT
2006
Springer
13 years 11 months ago
Polychronous mode automata
Among related synchronous programming principles, the model of computation of the Polychrony workbench stands out by its capability to give high-level description of systems where...
Jean-Pierre Talpin, Christian Brunette, Thierry Ga...