2512 search results - page 347 / 503 » Software Transactional Memory |
142
Voted
LCTRTS
2007
Springer
15 years 8 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
141
Voted
IPPS
2006
IEEE
15 years 8 months ago
2006
IEEE
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
139
Voted
DSN
2005
IEEE
15 years 8 months ago
2005
IEEE
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
132
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CF
2007
ACM
15 years 6 months ago
2007
ACM
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
115
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CASES
2009
ACM
15 years 5 months ago
2009
ACM
In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...