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FMCAD
2007
Springer
14 years 1 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
ASAP
2002
IEEE
76views Hardware» more  ASAP 2002»
14 years 13 days ago
A Component Architecture for FPGA-Based, DSP System Design
† Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greate...
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakaji...
CAV
2005
Springer
173views Hardware» more  CAV 2005»
14 years 1 months ago
Building Your Own Software Model Checker Using the Bogor Extensible Model Checking Framework
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...
Matthew B. Dwyer, John Hatcliff, Matthew Hoosier, ...
COORDINATION
2004
Springer
14 years 26 days ago
A Component-Based Parallel Constraint Solver
As a case study that illustrates our view on coordination and component-based software engineering, we present the design and implementation of a parallel constraint solver. The pa...
Peter Zoeteweij, Farhad Arbab