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ETS
2010
IEEE
130views Hardware» more  ETS 2010»
13 years 8 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens
DELTA
2004
IEEE
13 years 11 months ago
Arithmetic Transformations to Maximise the Use of Compressor Trees
Complex arithmetic computations, especially if derived from bit-level software descriptions, can be very inefficient if implemented directly in hardware (e.g., by translation of t...
Paolo Ienne, Ajay K. Verma
ERLANG
2007
ACM
13 years 11 months ago
An Erlang framework for autonomous mobile robots
This paper presents an Erlang-based framework, developed by the authors, for the realisation of software systems for autonomous mobile robots. On the basis of the analysis of the ...
Corrado Santoro
SIGMETRICS
1992
ACM
128views Hardware» more  SIGMETRICS 1992»
13 years 11 months ago
MemSpy: Analyzing Memory System Bottlenecks in Programs
To cope with the increasing difference between processor and main memory speeds, modern computer systems use deep memory hierarchies. In the presence of such hierarchies, the perf...
Margaret Martonosi, Anoop Gupta, Thomas E. Anderso...
ISPASS
2010
IEEE
14 years 2 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar