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» Software model checking with SPIN
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DAC
2005
ACM
14 years 8 months ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
CASES
2009
ACM
14 years 2 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...
FSTTCS
2009
Springer
14 years 2 months ago
Covering of ordinals
The paper focuses on the structure of fundamental sequences of ordinals smaller than ε0. A first result is the construction of a monadic second-order formula identifying a given ...
Laurent Braud
GECCO
2007
Springer
180views Optimization» more  GECCO 2007»
14 years 1 months ago
Genetic optimization for yacht design
This paper introduces a procedure for using genetic multiobjective optimization in yacht design. The problem described consists on the optimization of a bulb shape to improve the ...
Paolo Geremia, Mauro Poian, Silvia Poles
IPPS
2006
IEEE
14 years 1 months ago
Analysis of checksum-based execution schemes for pipelined processors
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
Bernhard Fechner