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ISCA
2007
IEEE
126views Hardware» more  ISCA 2007»
14 years 4 months ago
Comparing memory systems for chip multiprocessors
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...
ACSAC
2006
IEEE
14 years 4 months ago
Covert and Side Channels Due to Processor Architecture
Information leakage through covert channels and side channels is becoming a serious problem, especially when these are enhanced by modern processor architecture features. We show ...
Zhenghong Wang, Ruby B. Lee
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Enhanced Architectural Support for Variable-Length Decoding
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
Mohanarajah Sinnathamby, Subramania Sudharsanan, N...
HICSS
1994
IEEE
139views Biometrics» more  HICSS 1994»
14 years 2 months ago
Operating System Support for Shared Memory Clusters
This paper addresses a purely software-based solution to the multiprocessor cache coherence problem by structuring an operating system to provide for the coherence of its own data...
Ronald L. Rockhold, James L. Peterson
SIGSOFT
2009
ACM
14 years 11 months ago
Automatic steering of behavioral model inference
Many testing and analysis techniques use finite state models to validate and verify the quality of software systems. Since the specification of such models is complex and timecons...
David Lo, Leonardo Mariani, Mauro Pezzè