In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
This paper is an addition to the discourse surrounding interface theory and pervasive games. A buzzword by nature, the term ´interface´ needs to be investigated and redefined in...
We introduce a tiled 3D MIP map representation of global illumination data. The representation is an adaptive, sparse octree with a “brick” at each octree node; each brick con...
: This paper describes the collection and analysis of supercomputer I/O traces and their use in a collection of buffering and caching simulations. This serves two purposes. First, ...
A big challenge in implementing up to date simulation software for various applications is to bring together highly efficient mathematical methods on the one hand side and an ef...