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» Software transactional memory for multicore embedded systems
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ISCAS
2011
IEEE
261views Hardware» more  ISCAS 2011»
12 years 11 months ago
Hardware synchronization for embedded multi-core processors
Abstract— Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers shou...
Christian Stoif, Martin Schoeberl, Benito Liccardi...
PLDI
2009
ACM
14 years 6 days ago
A study of memory management for web-based applications on multicore processors
More and more server workloads are becoming Web-based. In these Web-based workloads, most of the memory objects are used only during one transaction. We study the effect of the me...
Hiroshi Inoue, Hideaki Komatsu, Toshio Nakatani
EMSOFT
2009
Springer
14 years 2 months ago
Flexible filters: load balancing through backpressure for stream programs
Stream processing is a promising paradigm for programming multi-core systems for high-performance embedded applications. We propose flexible filters as a technique that combines...
Rebecca L. Collins, Luca P. Carloni
CASES
2010
ACM
13 years 5 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
IPPS
2010
IEEE
13 years 4 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik