311 search results - page 7 / 63 » Software-Controlled Multithreading Using Informing Memory Op... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
SOSP
2003
ACM
14 years 4 months ago
2003
ACM
This paper describes RacerX, a static tool that uses flowsensitive, interprocedural analysis to detect both race conditions and deadlocks. It is explicitly designed to find erro...
JCPHY
2011
12 years 10 months ago
2011
The calculation of radial distribution functions (RDFs) from molecular dynamics trajectory data is a common and computationally expensive analysis task. The rate limiting step in ...
IPPS
1999
IEEE
1999
IEEE
Visualization and Performance Prediction of Multithreaded Solaris Programs by Tracing Kernel Threads
14 years 15 hour ago
Efficient performance tuning of parallel programs is often hard. We present a performance prediction and visualization tool called VPPB. Based on a monitored uni-processor executi...
IWMM
2011
Springer
12 years 10 months ago
2011
Springer
We propose a new memory model called short-term memory for managing objects on the heap. In contrast to the traditional persistent memory model for heap management, objects in sho...