67 search results - page 10 / 14 » Software-based instruction caching for embedded processors |
SIES
2008
IEEE
14 years 1 months ago
2008
IEEE
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
We present the TM3270 media-processor, the latest TriMedia VLIW processor, tuned to address the performance demands of standard definition video processing, combined with embedded...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
SBACPAD
2009
IEEE
14 years 2 months ago
2009
IEEE
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...