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» Sorting and Selection on Distributed Memory Bus Computers
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IPPS
2006
IEEE
14 years 2 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
IEEEPACT
1998
IEEE
14 years 27 days ago
Origin 2000 Design Enhancements for Communication Intensive Applications
The SGI Origin 2000 is designedto support a wide range of applications and has low local and remote memory latencies. However, it often has a high ratio of remote to local misses....
Gheith A. Abandah, Edward S. Davidson
WDAG
1989
Springer
62views Algorithms» more  WDAG 1989»
14 years 20 days ago
Possibility and Impossibility Results in a Shared Memory Environment
We focus on unreliable asynchronous shared memory model which support only atomic read and write operations. For such a model we provide a necessary condition for the solvability ...
Gadi Taubenfeld, Shlomo Moran
ICPPW
2006
IEEE
14 years 2 months ago
Dynamic Algorithm Selection in Parallel GAMESS Calculations
Applications augmented with adaptive capabilities are becoming common in parallel computing environments which share resources such as main memory, network, or disk I/O. For large...
Nurzhan Ustemirov, Masha Sosonkina, Mark S. Gordon...
SPAA
1997
ACM
14 years 25 days ago
Fine-Grain Multithreading with the EM-X Multiprocessor
- Multithreading aims to tolerate latency by overlapping communication with computation. This report explicates the multithreading capabilities of the EM-X distributed-memory multi...
Andrew Sohn, Yuetsu Kodama, Jui Ku, Mitsuhisa Sato...