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EELC
2006
128views Languages» more  EELC 2006»
14 years 2 months ago
Evolving Distributed Representations for Language with Self-Organizing Maps
We present a neural-competitive learning model of language evolution in which several symbol sequences compete to signify a given propositional meaning. Both symbol sequences and p...
Simon D. Levy, Simon Kirby
ARC
2010
Springer
186views Hardware» more  ARC 2010»
14 years 2 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
IJNSEC
2007
137views more  IJNSEC 2007»
13 years 11 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram
CISIS
2011
IEEE
12 years 11 months ago
Improving Scheduling Techniques in Heterogeneous Systems with Dynamic, On-Line Optimisations
—Computational performance increasingly depends on parallelism, and many systems rely on heterogeneous resources such as GPUs and FPGAs to accelerate computationally intensive ap...
Marcin Bogdanski, Peter R. Lewis, Tobias Becker, X...
FPGA
2006
ACM
111views FPGA» more  FPGA 2006»
14 years 2 months ago
FPGA clock network architecture: flexibility vs. area and power
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
Julien Lamoureux, Steven J. E. Wilton