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ATVA
2008
Springer
144views Hardware» more  ATVA 2008»
13 years 12 months ago
Tests, Proofs and Refinements
1 : Logic in Specification and Verification (abstract) Natarajan Shankar (SRI) Session Chair : Sungdeok Cha 12 : 00 13 : 00 Lunch 13 : 00 15 : 00 2 : Boolean Modeling of Cell Biolo...
Sriram K. Rajamani
DFG
2004
Springer
14 years 1 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...
CSCLP
2008
Springer
13 years 11 months ago
Challenges in Constraint-Based Analysis of Hybrid Systems
In the analysis of hybrid discrete-continuous systems, rich arithmetic constraint formulae with complex Boolean structure arise naturally. The iSAT algorithm, a solver for such for...
Andreas Eggers, Natalia Kalinnik, Stefan Kupfersch...
PRDC
2002
IEEE
14 years 2 months ago
Detecting Feature Interactions in Telecommunication Services with a SAT Solver
Feature interaction is a kind of inconsistent conflict between multiple communication services and considered an obstacle to developing reliable telephony systems. In this paper ...
Tatsuhiro Tsuchiya, Masahide Nakamura, Tohru Kikun...
ICCD
1995
IEEE
109views Hardware» more  ICCD 1995»
14 years 1 months ago
Verifying the performance of the PCI local bus using symbolic techniques
Symbolic model checking is a successful technique for checking properties of large finite-state systems. This method has been used to verify a number of real-world hardware desig...
Sérgio Vale Aguiar Campos, Edmund M. Clarke...