22 search results - page 1 / 5 » Special Purpose Architecture for Accelerating Bitmap DRC |
DAC
1989
ACM
14 years 3 months ago
1989
ACM
In this paper we propose algorithms for performing DRC on a bitmapped layout altd developspecial purpose architecture for its implementation. we Use window scan method, with flexib...
TVLSI
2008
13 years 10 months ago
2008
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
ACMSE
2006
ACM
14 years 4 months ago
2006
ACM
Applications involving interactive modeling of deformable objects require highly iterative, floating-point intensive numerical simulations. As the complexity of these models incr...
FPL
2010
Springer
13 years 9 months ago
2010
Springer
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
CASES
2009
ACM
14 years 5 months ago
2009
ACM
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...