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» Specify, Compile, Run: Hardware from PSL
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CC
2008
Springer
240views System Software» more  CC 2008»
13 years 9 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
FCCM
1998
IEEE
119views VLSI» more  FCCM 1998»
13 years 11 months ago
Specifying and Compiling Applications for RaPiD
E cient, deeply pipelined implementations exist for a wide variety of important computation-intensive applications, and many special-purpose hardware machines have been built that...
Darren C. Cronquist, Paul Franklin, Stefan G. Berg...
BCS
2008
13 years 9 months ago
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation
This paper describes our approaches to raise the level of abstraction at which hardware suitable for accelerating computationally-intensive applications can be specified. Field-Pr...
Qiang Liu, George A. Constantinides, Konstantinos ...
FPL
2005
Springer
131views Hardware» more  FPL 2005»
14 years 1 months ago
An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications
Dynamically reconfigurable logic is becoming an important design unit in SoC system. A method to make the reconfiguration management transparent to software applications is requir...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
CASES
2006
ACM
14 years 1 months ago
Automatic performance model construction for the fast software exploration of new hardware designs
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
John Cavazos, Christophe Dubach, Felix V. Agakov, ...