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» Speculative Dynamic Vectorization
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119
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MICRO
2005
IEEE
114views Hardware» more  MICRO 2005»
15 years 8 months ago
Address-Indexed Memory Disambiguation and Store-to-Load Forwarding
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
Sam S. Stone, Kevin M. Woley, Matthew I. Frank
131
Voted
ET
2007
101views more  ET 2007»
15 years 2 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
120
Voted
TC
2002
15 years 2 months ago
On Augmenting Trace Cache for High-Bandwidth Value Prediction
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction and speculatively executes its data-dependent instructions based on th...
Sang Jeong Lee, Pen-Chung Yew
113
Voted
ICRA
2009
IEEE
98views Robotics» more  ICRA 2009»
15 years 9 months ago
Path following for an omnidirectional mobile robot based on model predictive control
— In this paper, the path following problem of an omnidirectional mobile robot has been studied. Given the error dynamic model derived from the robot state vector and the path st...
Kiattisin Kanjanawanishkul, Andreas Zell
137
Voted
DAGM
2005
Springer
15 years 8 months ago
Rapid Online Learning of Objects in a Biologically Motivated Recognition Architecture
We present an approach for the supervised online learning of object representations based on a biologically motivated architecture of visual processing. We use the output of a rece...
Stephan Kirstein, Heiko Wersing, Edgar Körner