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ICPPW
2005
IEEE
14 years 1 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
ICPADS
2007
IEEE
14 years 1 months ago
Loop recreation for thread-level speculation
For some sequential loops, existing techniques that form speculative threads only at their loop boundaries do not adequately expose the speculative parallelism inherent in them. T...
Lin Gao 0002, Lian Li 0002, Jingling Xue, Tin-Fook...
IPPS
2010
IEEE
13 years 5 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...
TPDS
2010
144views more  TPDS 2010»
13 years 6 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
ASPLOS
2008
ACM
13 years 9 months ago
The potential for variable-granularity access tracking for optimistic parallelism
Support for optimistic parallelism such as thread-level speculation (TLS) and transactional memory (TM) has been proposed to ease the task of parallelizing software to exploit the...
Mihai Burcea, J. Gregory Steffan, Cristiana Amza