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LCPC
2004
Springer
14 years 28 days ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
SC
2005
ACM
14 years 1 months ago
A Power-Aware Run-Time System for High-Performance Computing
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
Chung-Hsing Hsu, Wu-chun Feng
ICDCS
2008
IEEE
14 years 2 months ago
Scalable and Adaptive Metadata Management in Ultra Large-Scale File Systems
This paper presents a scalable and adaptive decentralized metadata lookup scheme for ultra large-scale file systems (≥ Petabytes or even Exabytes). Our scheme logically organiz...
Yu Hua, Yifeng Zhu, Hong Jiang, Dan Feng, Lei Tian
ICPPW
1999
IEEE
13 years 12 months ago
Multistage Ring Network: A New Multiple Ring Network for Large Scale Multiprocessors
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
Dongho Yoo, Inbum Jung, Seung Ryoul Maeng, Hyungla...
SBCCI
2003
ACM
160views VLSI» more  SBCCI 2003»
14 years 24 days ago
Novel Design Methodology for High-Performance XOR-XNOR Circuit Design
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi