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AUSAI
2006
Springer
13 years 11 months ago
2006
Springer
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
We propose a timing optimization technique for a complex finite state machine that consists of not only random logic but also data operators. In such a design, the timing critical...
SAFECOMP
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. Simulation-based Fault Injection in VHDL descriptions is increasingly common due to the popularity of top-down design flows exploiting this language. This paper presents ...
FPL
1995
Springer
13 years 11 months ago
1995
Springer