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EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
14 years 1 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
ICTAI
1997
IEEE
14 years 1 months ago
GA-Based Performance Analysis of Network Protocols
This paper tackles the problem of analyzing the correctness and performance of a computer network protocol. Given the complexity of the problem, no currently used technique is abl...
Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Gi...
CIKM
2008
Springer
13 years 12 months ago
Predicting individual disease risk based on medical history
The monumental cost of health care, especially for chronic disease treatment, is quickly becoming unmanageable. This crisis has motivated the drive towards preventative medicine, ...
Darcy A. Davis, Nitesh V. Chawla, Nicholas Blumm, ...
CF
2005
ACM
13 years 12 months ago
Reducing misspeculation overhead for module-level speculative execution
Thread-level speculative execution is a technique that makes it possible for a wider range of single-threaded applications to make use of the processing resources in a chip multip...
Fredrik Warg, Per Stenström
CSL
2008
Springer
13 years 11 months ago
Type-Based Termination with Sized Products
Type-based termination is a semantically intuitive method that ensures termination of recursive definitions by tracking the size of datatype elements, and by checking that recursiv...
Gilles Barthe, Benjamin Grégoire, Colin Rib...