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» Static performance prediction of skeletal parallel programs
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ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 5 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu
EUROPAR
2003
Springer
14 years 1 months ago
Dynamic Load Balancing for I/O- and Memory-Intensive Workload in clusters Using a Feedback Control Mechanism
1 One common assumption of the existing models of load balancing is that the weights of resources and I/O buffer size are statically configured. Though the static configuration ...
Xiao Qin, Hong Jiang, Yifeng Zhu, David R. Swanson
HPCA
2004
IEEE
14 years 8 months ago
Reducing the Scheduling Critical Cycle Using Wakeup Prediction
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
Todd E. Ehrhart, Sanjay J. Patel
IPPS
2006
IEEE
14 years 2 months ago
A performance model for fine-grain accesses in UPC
UPC’s implicit communication and fine-grain programming style make application performance modeling a challenging task. The correspondence between remote references and communi...
Zhang Zhang, S. R. Seidel
IEEEPACT
2000
IEEE
14 years 26 days ago
A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization
Dynamic Optimization is an umbrella term that refers to any optimization of software that is performed after the initial compile time. It is a complementary optimization opportuni...
Kim M. Hazelwood, Thomas M. Conte