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ISPASS
2006
IEEE
14 years 5 months ago
Branch trace compression for snapshot-based simulation
We present a scheme to compress branch trace information for use in snapshot-based microarchitecture simulation. The compressed trace can be used to warm any arbitrary branch pred...
Kenneth C. Barr, Krste Asanovic
PRDC
2006
IEEE
14 years 5 months ago
SEVA: A Soft-Error- and Variation-Aware Cache Architecture
As SRAM devices are scaled down, the number of variation-induced defective memory cells increases rapidly. Combination of ECC, particularly SECDED, with a redundancy technique can...
Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
TIME
2006
IEEE
14 years 5 months ago
How Would You Like to Aggregate Your Temporal Data?
Published in: Proceedings of the 13th International Symposium on Temporal Representation and Reasoning (TIME-06), Budapest, Hungary, June 2006. IEEE Computer Society Press. Real-w...
Michael H. Böhlen, Johann Gamper, Christian S...
CHINZ
2006
ACM
14 years 4 months ago
Digital backpacking in the museum with a SmartCard
This paper reports on the evaluation of a digitallyaugmented exhibition on the history of modern media and our experiences with the methodic approach employed. As a central elemen...
Eva Hornecker, Matthias Stifter
INFOSCALE
2006
ACM
14 years 4 months ago
Scalable hardware accelerator for comparing DNA and protein sequences
Abstract— Comparing genetic sequences is a well-known problem in bioinformatics. Newly determined sequences are being compared to known sequences stored in databases in order to ...
Philippe Faes, Bram Minnaert, Mark Christiaens, Er...