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PCI
2005
Springer
15 years 9 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...
136
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IPPS
2010
IEEE
15 years 2 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
SAC
2011
ACM
14 years 6 months ago
Site-autonomous distributed semantic caching
Semantic caching augments cached data with a semantic description of the data. These semantic descriptions can be used to improve execution time for similar queries by retrieving ...
Norvald H. Ryeng, Jon Olav Hauglid, Kjetil N&oslas...
TOG
2012
230views Communications» more  TOG 2012»
13 years 6 months ago
Decoupling algorithms from schedules for easy optimization of image processing pipelines
Using existing programming tools, writing high-performance image processing code requires sacrificing readability, portability, and modularity. We argue that this is a consequenc...
Jonathan Ragan-Kelley, Andrew Adams, Sylvain Paris...
SIGMOD
2006
ACM
150views Database» more  SIGMOD 2006»
16 years 4 months ago
On-the-fly sharing for streamed aggregation
Data streaming systems are becoming essential for monitoring applications such as financial analysis and network intrusion detection. These systems often have to process many simi...
Sailesh Krishnamurthy, Chung Wu, Michael J. Frankl...