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ICS
2009
Tsinghua U.
14 years 3 months ago
Computer generation of fast fourier transforms for the cell broadband engine
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
Srinivas Chellappa, Franz Franchetti, Markus P&uum...
HICSS
2007
IEEE
85views Biometrics» more  HICSS 2007»
14 years 2 months ago
The Impact of Value on Governance Decisions for IT-Based Alliances: Evidence from a Joint Venture in the Wireless Networks Indus
Consideration of cost and resource benefits generated from an alliance have prevailed the theoretical and empirical research about strategic alliances and value networks/ webs. As...
Adamantia G. Pateli, George M. Giaglis
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 2 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
VLDB
1999
ACM
133views Database» more  VLDB 1999»
14 years 13 days ago
Online Dynamic Reordering for Interactive Data Processing
We present a pipelining, dynamically usercontrollable reorder operator, for use in dataintensive applications. Allowing the user to reorder the data delivery on the fly increases...
Vijayshankar Raman, Bhaskaran Raman, Joseph M. Hel...
CSREAESA
2003
13 years 9 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...