We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
The cost for testing integrated circuits represents a growing percentage of the total cost for their production. The former strictly depends on the length of the test session, and...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
In this paper we prove that the avalanche problem for the Kadanoff sandpile model (KSPM) is P-complete for two-dimensions. Our proof is based on a reduction from the monotone circ...
We propose a framework for the streaming of light fields over a lossy error-prone packet network. This system is optimized for the end-user according to a rate-distortion criterio...
The integration of different wireless access technologies combined with the huge characteristic diversity of supported services in next-generation systems creates a real heterogen...