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PPOPP
2006
ACM
14 years 21 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
HPCC
2005
Springer
14 years 8 days ago
Transactional Cluster Computing
A lot of sophisticated techniques and platforms have been proposed to build distributed object systems. Remote method invocation and explicit message passing on top of traditional...
Stefan Frenz, Michael Schöttner, Ralph Gö...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 1 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
LCTRTS
2009
Springer
14 years 1 months ago
Software transactional memory for multicore embedded systems
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
Jennifer Mankin, David R. Kaeli, John Ardini
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
14 years 1 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li