Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
—Resource allocation is investigated for fading relay channels under separate power constraints at the source and relay nodes. As a basic information-theoretic model for fading r...
Yingbin Liang, Venugopal V. Veeravalli, H. Vincent...
Wireless ad-hoc sensor networks have the potential to provide the missing interface between the physical world and the Internet, thus impacting a large number of users. This conne...
Seapahn Megerian, Farinaz Koushanfar, Gang Qu, Gia...
Flow measurement evolved into the primary method for measuring the composition of Internet traffic. Large ISPs and small networks use it to track dominant applications, dominant ...
Complex queries over high speed data streams often need to rely on approximations to keep up with their input. The research community has developed a rich literature on approximat...
Theodore Johnson, S. Muthukrishnan, Irina Rozenbau...