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ICS
1997
Tsinghua U.
13 years 11 months ago
Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology
Modern microprocessors can achieve high performance on linear algebra kernels but this currently requires extensive machine-speci c hand tuning. We have developed a methodology wh...
Jeff Bilmes, Krste Asanovic, Chee-Whye Chin, James...
IPPS
2000
IEEE
14 years 1 days ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
SIGGRAPH
1994
ACM
13 years 11 months ago
IRIS performer: a high performance multiprocessing toolkit for real-time 3D graphics
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
John Rohlf, James Helman
CORR
2008
Springer
117views Education» more  CORR 2008»
13 years 7 months ago
A High Performance Memory Database for Web Application Caches
This paper presents the architecture and characteristics of a memory database intended to be used as a cache engine for web applications. Primary goals of this database are speed a...
Ivan Voras, Danko Basch, Mario Zagar
SSD
2005
Springer
145views Database» more  SSD 2005»
14 years 1 months ago
High Performance Multimodal Networks
Networks often form the core of many users’ spatial databases. Networks are used to support the rapid navigation and analysis of linearly connected data such as that found in tra...
Erik G. Hoel, Wee-Liang Heng, Dale Honeycutt