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CISIS
2010
IEEE
14 years 2 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
14 years 2 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...
CODES
2008
IEEE
14 years 1 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
ICWE
2007
Springer
14 years 1 months ago
MDWEnet: A Practical Approach to Achieving Interoperability of Model-Driven Web Engineering Methods
Current model-driven Web Engineering approaches (such as OO-H, UWE or WebML) provide a set of methods and supporting tools for a systematic design and development of Web applicatio...
Antonio Vallecillo, Nora Koch, Cristina Cachero, S...
OOPSLA
2007
Springer
14 years 1 months ago
Scalable omniscient debugging
Omniscient debuggers make it possible to navigate backwards in time within a program execution trace, drastically improving the task of debugging complex applications. Still, they...
Guillaume Pothier, Éric Tanter, José...