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» Symbolic Analysis Methods for Masks, Circuits, and Systems
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ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
14 years 4 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
VLSID
2000
IEEE
102views VLSI» more  VLSID 2000»
13 years 11 months ago
Inductance Characterization of Small Interconnects Using Test-Signal Method
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
13 years 11 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
DATE
2008
IEEE
170views Hardware» more  DATE 2008»
14 years 1 months ago
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
Duo Li, Sheldon X.-D. Tan, Bruce McGaughy
ISQED
2007
IEEE
236views Hardware» more  ISQED 2007»
14 years 1 months ago
3DFFT: Thermal Analysis of Non-Homogeneous IC Using 3D FFT Green Function Method
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu