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» Symbolic Analysis Methods for Masks, Circuits, and Systems
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DATE
2009
IEEE
90views Hardware» more  DATE 2009»
14 years 1 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
ICDAR
2011
IEEE
12 years 6 months ago
Lexicon-Free, Novel Segmentation of Online Handwritten Indic Words
—Research in the field of recognizing unlimited vocabulary, online handwritten Indic words is still in its infancy. Most of the focus so far has been in the area of isolated cha...
Suresh Sundaram, A. G. Ramakrishnan
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
13 years 10 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar
ICCAD
2007
IEEE
108views Hardware» more  ICCAD 2007»
14 years 3 months ago
Novel wire density driven full-chip routing for CMP variation control
— As nanometer technology advances, the post-CMP dielectric thickness variation control becomes crucial for manufacturing closure. To improve CMP quality, dummy feature filling ...
Huang-Yu Chen, Szu-Jui Chou, Sheng-Lung Wang, Yao-...
TAP
2008
Springer
93views Hardware» more  TAP 2008»
13 years 6 months ago
Pex-White Box Test Generation for .NET
Pex automatically produces a small test suite with high code coverage for a .NET program. To this end, Pex performs a systematic program analysis (using dynamic symbolic execution,...
Nikolai Tillmann, Jonathan de Halleux