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» Symbolic Bounded Synthesis
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147
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CAV
2000
Springer
187views Hardware» more  CAV 2000»
15 years 7 months ago
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
In this paper we show how to do symbolic model checking using Boolean Expression Diagrams (BEDs), a non-canonical representation for Boolean formulas, instead of Binary Decision Di...
Poul Frederick Williams, Armin Biere, Edmund M. Cl...
155
Voted
CCL
1994
Springer
15 years 7 months ago
Application of Constraint Logic Programming for VLSI CAD Tools
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
Renate Beckmann, Ulrich Bieker, Ingolf Markhof
139
Voted
POPL
2010
ACM
16 years 1 months ago
From Program Verification to Program Synthesis
This paper describes a novel technique for the synthesis of imperative programs. Automated program synthesis has the potential to make programming and the design of systems easier...
Saurabh Srivastava, Sumit Gulwani, Jeffrey S. Fost...
114
Voted
TASE
2007
IEEE
15 years 10 months ago
Evaluation of SAT-based Bounded Model Checking of ACTL Properties
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...
Yanyan Xu, Wei Chen, Liang Xu, Wenhui Zhang
134
Voted
ATVA
2006
Springer
112views Hardware» more  ATVA 2006»
15 years 7 months ago
Synthesis for Probabilistic Environments
In synthesis we construct finite state systems from temporal specifications. While this problem is well understood in the classical setting of non-probabilistic synthesis, this pap...
Sven Schewe