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GLVLSI
2005
IEEE
97views VLSI» more  GLVLSI 2005»
14 years 2 months ago
On equivalence checking and logic synthesis of circuits with a common specification
In this paper we develop a theory of equivalence checking (EC) and logic synthesis of circuits with a common specification (CS). We show that two combinational circuits N1, N2 have...
Eugene Goldberg
FMCAD
2009
Springer
14 years 3 months ago
Scalable conditional equivalence checking: An automated invariant-generation based approach
—Sequential equivalence checking (SEC) technologies, capable of demonstrating the behavioral equivalence of two designs, have grown dramatically in capacity over the past decades...
Jason Baumgartner, Hari Mony, Michael L. Case, Jun...
ICCAD
2006
IEEE
128views Hardware» more  ICCAD 2006»
14 years 5 months ago
Improvements to combinational equivalence checking
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
IANDC
2010
68views more  IANDC 2010»
13 years 7 months ago
On the complexity of checking semantic equivalences between pushdown processes and finite-state processes
Simulation preorder/equivalence and bisimulation equivalence are the most commonly used equivalences in concurrency theory. Their standard definitions are often called strong sim...
Antonín Kucera, Richard Mayr
GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
14 years 3 months ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang