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» Symbolic Model Checking for Event-Driven Real-Time Systems
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ARTS
1997
Springer
13 years 11 months ago
The Verus Language: Representing Time Efficiently with BDDs
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
Sérgio Vale Aguiar Campos, Edmund M. Clarke
SBMF
2009
Springer
105views Formal Methods» more  SBMF 2009»
14 years 1 months ago
Verifying Compiled File System Code
Abstract. This paper presents a case study on retrospective verication of the Linux Virtual File System (VFS), which is aimed at checking for violations of API usage rules and mem...
Jan Tobias Mühlberg, Gerald Lüttgen
AMOST
2007
ACM
13 years 11 months ago
Achieving both model and code coverage with automated gray-box testing
We have devised a novel technique to automatically generate test cases for a software system, combining black-box model-based testing with white-box parameterized unit testing. Th...
Nicolas Kicillof, Wolfgang Grieskamp, Nikolai Till...
ICSE
2008
IEEE-ACM
14 years 8 months ago
A verification system for timed interval calculus
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
TACAS
2005
Springer
124views Algorithms» more  TACAS 2005»
14 years 26 days ago
Dynamic Symmetry Reduction
Abstract. Symmetry reduction is a technique to combat the state explosion problem in temporal logic model checking. Its use with symbolic representation has suffered from the proh...
E. Allen Emerson, Thomas Wahl