321 search results - page 17 / 65 » Symbolic Model Checking for Probabilistic Timed Automata |
RTCSA
1999
IEEE
14 years 1 months ago
1999
IEEE
Scheduling in an environment with constraints of many different types is known to be a hard problem. We tackle this problem for an integrated steel plant in Ghent, Belgium, using ...
ENTCS
2006
13 years 8 months ago
2006
Partially Ordered Symbolic Automata (POSAs) are used as the semantical foundation of visual formalisms like the scenario based language of Live Sequence Charts (LSCs). To check whe...
GLVLSI
2000
IEEE
14 years 1 months ago
2000
IEEE
Symbolic Model checking is a widely used technique in sequential verification. As the size of the OBDDs and also the computation time depends on the order of the input variables,...
CHARME
2003
Springer
14 years 12 days ago
2003
Springer
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
RTSS
1997
IEEE
14 years 28 days ago
1997
IEEE
This paper presents an on-the-fly and symbolic algorithm for checking whether a timed automaton satisfies a formula of a timed temporal logic which is more expressive than TCTL....