150 search results - page 18 / 30 » Symbolic Model Checking for Simply-Timed Systems |
FM
2003
Springer
14 years 19 days ago
2003
Springer
Counterexamples explain why a desired temporal logic property fails to hold, and as such are considered to be the most useful form of output from model-checkers. Multi-valued model...
TACAS
2001
Springer
13 years 12 months ago
2001
Springer
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
TACAS
2001
Springer
13 years 12 months ago
2001
Springer
In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complet...
FOSSACS
2005
Springer
14 years 28 days ago
2005
Springer
Nominal calculi have been shown very effective to formally model a variety of computational phenomena. The models of nominal calculi have often infinite states, thus making model ...
ATVA
2007
Springer
14 years 1 months ago
2007
Springer
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...