651 search results - page 114 / 131 » Synchronization of periodic clocks |
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
: Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates of above 100MHz. This combined with FPGAs l...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
MMNS
2000
13 years 9 months ago
2000
: This paper presents an evaluation of a traffic management mechanism for high speed networks called RDMA (Route Division Multiple Access), developed as part of the Isochronets, a ...
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
QEST
2010
IEEE
13 years 5 months ago
2010
IEEE
Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recen...