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ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
14 years 2 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
ASYNC
2002
IEEE
150views Hardware» more  ASYNC 2002»
14 years 1 months ago
Clock Synchronization through Handshake Signalling
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...
Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters,...
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 8 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 5 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...
HPCC
2007
Springer
14 years 2 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to ef...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai